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专利名称：EFFICIENT EXECUTION OF MEMORY
BARRIER BUS COMMANDS
发明人：SULLIVAN, James Edward, Jr.,GANASAN, Jaya
Prakash Subramaniam,HOFMANN, RichardGerard
申请号：EP07758097.5申请日：20070307公开号：EP1999577B1公开日：20120613
摘要：The disclosure is directed to a weakly-ordered processing system and methodof executing memory barriers in weakly-ordered processing system. The processingsystem includes memory and a master device configured to issue memory accessrequests, including memory barriers, to the memory. The processing system alsoincludes a slave device configured to provide the master device access to the memory,the slave device being further configured to produce a signal indicating that an orderingconstraint imposed by a memory barrier issued by the master device will be enforced, thesignal being produced before the execution of all memory access requests issued by themaster device to the memory before the memory barrier.
申请人：QUALCOMM INC
地址：US
国籍：US
代理机构：Heselberger, Johannes
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